TSMC, chip design software firms tap AI to help chips use less energy

TSMC, chip design software firms tap AI to help chips use less energy

In an era where artificial intelligence (AI) is rapidly advancing, the energy demands of the computing chips that power these technologies have become a significant concern. At a recent conference in Silicon Valley, Taiwan Semiconductor Manufacturing Company (TSMC), the leading global chip manufacturer, introduced a groundbreaking approach to enhance the energy efficiency of AI chips using AI-driven design software. TSMC presented its ambitious goal of improving the energy efficiency of AI computing chips by up to tenfold. For context, current high-performance AI servers from Nvidia can draw as much as 1,200 watts during intensive operations—equating to the energy consumed by 1,000 average U.S. homes running continuously. To address this challenge, TSMC is focusing on a new generation of chip designs that incorporate multiple smaller components, known as "chiplets," which utilize varying technologies to create a cohesive computing package. The integration of AI in chip design is proving transformative, especially as design firms increasingly turn to AI-powered software from industry leaders like Cadence Design Systems and Synopsys. Both companies recently unveiled innovative products developed in close collaboration with TSMC. Remarkably, these AI tools have outperformed human engineers in solving complex design tasks more efficiently. "This helps us fully leverage TSMC's technological capabilities, and we find it incredibly beneficial," stated Jim Chang, TSMC's deputy director of the 3DIC Methodology Group, during his presentation on these advancements. "What takes our designers two days can be accomplished in just five minutes with the right software." As the semiconductor industry faces limitations in traditional chip manufacturing—particularly regarding data transfer via electrical connections—new technologies such as optical connections between chips are being explored. Kaushik Veeraraghavan, an engineer from Meta Platforms, emphasized that these challenges extend beyond engineering, framing them as fundamental physical issues that need to be addressed to ensure reliability in large-scale data centers.

Sources : Mint

Published On : Sep 25, 2025, 09:10

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