IBM unveils sub-1 nanometre chip technology, targets production within five years

In a significant advancement for semiconductor technology, IBM has announced what it describes as the world's first sub-1 nanometre chip technology. This groundbreaking development could potentially extend the life of semiconductor scaling for another decade, as traditional transistor designs are nearing their physical limits. The technology, showcased at the unprecedented 0.7 nm, or 7 angstrom node, employs an innovative three-dimensional transistor architecture known as 'nanostack.' IBM claims this new design could enhance performance by up to 50% or improve energy efficiency by as much as 70% compared to its previous 2 nm technology introduced in 2021. Remarkably, this chip can accommodate nearly 100 billion transistors within an area comparable to that of a fingernail, nearly doubling the density of the existing 2 nm chip. Transistors, the minute electronic switches that execute calculations within a processor, play a critical role in computing power. By fitting a greater number of transistors into a smaller space, IBM aims to boost computational capabilities while simultaneously reducing energy usage. Jay Gambetta, director of IBM Research and an IBM Fellow, emphasized the significance of this breakthrough, stating, "IBM’s latest chip advancement represents a pivotal moment in computing, moving technology beyond the nanometer scale into the atomic realm." He further noted that the nanostack architecture not only focuses on miniaturizing transistors but also redefines the construction of chips for increased power and energy efficiency. Distinct from current nanosheet designs, IBM’s nanostack architecture arranges transistors vertically in a staggered configuration. This innovative approach allows chip manufacturers to incorporate more components in a given area and utilize varied materials in each layer to optimize both performance and power consumption independently. IBM has confirmed the effectiveness of this architecture through functioning transistor structures and a working CMOS inverter, a fundamental component in digital chips. Additionally, researchers have showcased a 40% enhancement in the scaling of SRAM, a type of high-speed memory positioned close to processors. This compact SRAM is crucial for accelerating data transfer to artificial intelligence chips, addressing a significant bottleneck in memory bandwidth. It's important to note that the 0.7 nm designation pertains to a generation of manufacturing technology rather than the precise physical dimensions of every transistor feature. At such cutting-edge nodes, dimensions are increasingly referenced in angstroms, with one angstrom equating to one-tenth of a nanometre.